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August 2000
ML6518* 18 Line Hot-Insertable Active SCSI Terminator
GENERAL DESCRIPTION
The ML6518 BiCMOS 18 line SCSI terminator provides active termination in SCSI systems using single-ended drivers and receivers. Active SCSI termination helps to effectively control analog transmission line effects such as ringing, noise, crosstalk, and ground bounce. In addition, the ML6518 provides support for hot insertability on the SCSI bus. The ML6518 provides a V-I characteristic optimized to minimize transmission line effects during both signal negation and assertion using a MOSFET-based architecture. The desired V-I characteristic is achieved by trimming one resistor in the control block. Internal clamping controls signal assertion transients and provides current sink capability to handle active negation driver overshoots above 2.85V. It provides a 2.85V reference through an internal low dropout (1V) linear regulator. The ML6518 also provides a disconnect function which effectively removes the terminator from the SCSI bus. The disconnect mode capacitance is typically less than 5pF per line. Current limiting and thermal shutdown protection are also included.
FEATURES
s s s s s s s s s
Fully monolithic IC solution providing active termination for 18 lines of the SCSI bus Provides onboard support for hot-insertability on the SCSI bus Low dropout voltage (1V) linear regulator, trimmed for accurate termination current Low disconnect capacitance (typically < 5pF) Logic pin with active pull-up to disconnect terminator from the SCSI bus Current sinking capability in excess of 8.3mA per line to handle active negation driver overshoots above 2.85V Negative clamping on all lines to handle signal assertion transients Regulator can source 400mA and sink 150mA while maintaining regulation Current limit and thermal shutdown protection *This Part Is End Of Life As Of August 1, 2000
BLOCK DIAGRAM
TERMPWR VREF DISCNKT
2.85V LINEAR REGULATOR 1V DROPOUT 2.85V
GND
RTRIM VREF CONTROL BLOCK
MOSFETs WITH IMAX = 24mA
...
NCLAMP
...
...
...
NCLAMP NCLAMP L1 L2
...
L18
18 TERMINATION LINES
NCLAMP = Negative Clamp Circuit design patent pending.
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ML6518
PIN CONFIGURATIONS
ML6518 28-Pin SOIC (S28)
ML6518 28-Pin SOIC (S28)
ISENSE H1 H2 H3 RSCS CT VREF VSPEED L1 L2 L3 ILIMIT VCO OUT VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 GND RREF COS BRAKE FB 3 FB 2 FB 1 CRAMP VCO IN CEN FAULT CRST RVCO CVCO
TOP VIEW
ML6518 32-Pin TQFP (H32-7)
ML6518 32-Pin TQFP (H32-7)
CLK IN DGND AGND VOUT GAIN VREF VCC XXX
CLK IN GAIN DGND AGND VOUT VREF VCC XXX
32 31 30 29 28 27 26 25 24 1 2 3 4 5 6 7 8 9 23 22 21 20 19 18 17 10 11 12 13 14 15 16
CLK IN GAIN DGND AGND VOUT VREF VCC XXX
VCC
CLK IN
GAIN
DGND
AGND
VOUT
TOP VIEW
2
VREF
XXX
ML6518
PIN DESCRIPTION
TQFP PIN# SOIC PIN# NAME FUNCTION TQFP PIN# SOIC PIN# NAME FUNCTION
1 2 3 4 5 6 7 8 9
25 26 27 28 1 2 3 4 6
L1 L2 L3 L4 L5 L6 L7 L8 L9
Signal termination for SCSI bus line 1 Signal termination for SCSI bus line 2 Signal termination for SCSI bus line 3 Signal termination for SCSI bus line 4 Signal termination for SCSI bus line 5 Signal termination for SCSI bus line 6 Signal termination for SCSI bus line 7 Signal termination for SCSI bus line 8 Signal termination for SCSI bus line 9 Ground
16 17 18 19 20 21 22 23 24 25, 26
11 12 13 14 15 16 17 18 19
L10 L11 L12 L13 L14 L15 L16 L17 L18
Signal termination for SCSI bus line 10 Signal termination for SCSI bus line 11 Signal termination for SCSI bus line 12 Signal termination for SCSI bus line 13 Signal termination for SCSI bus line 14 Signal termination for SCSI bus line 15 Signal termination for SCSI bus line 16 Signal termination for SCSI bus line 17 Signal termination for SCSI bus line 18
11-14, 7, 22, GND 27-30 23 15 8
DISCNKT Terminator disconnect. Logic input to disconnect the terminator from the bus when the SCSI device no longer needs termination. DISCNKT has a 200ky internal pull-up resistor connected to TERMPWR for use with a mechanical switch
20, 21 TERMPWR Power should be connected to the SCSI TERMPWR line. A 22F tantalum bypass capacitor is recommended as shown in the application diagram 24 VREF 2.85V VREF output. External decoupling with a 10F tantalum in parallel with a 0.1F ceramic capacitor is recommended as shown in the application diagram
31, 32
3
ML6518
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Signal Line Voltage ...... GND - 0.3V to TERMPWR + 0.3V Regulator Output Current ................................... 500mA TERMPWR Voltage .......................................... -0.3 to 7V Junction Temperature ............................................. 150C Storage Temperature Range ...................... -65C to 150C Lead Temperature (Soldering 10 sec) .................... +260C Thermal Resistance (qJA) SOIC Package .................................................. 75C/W TQFP Package .................................................. 65C/W
OPERATING CONDITIONS
Temperature Range ........................................ 0C to 70C TERMPWR Voltage Range ........................... 4.0V to 5.25V
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, TERMPWR = 4V to 5.25V, TA = Operating Temperature Range (Note 1)
PARAMETER Supply TERMPWR Supply Current L1-L18 open, DISCNKT open L1-L18 = 0.2V, DISCNKT open Disconnect Mode Current DISCNKT Input Low Voltage Input High Voltage Output Output High Voltage Output Current (Normal Mode) Hot Insertion Peak Current Output Clamp Voltage Sinking Current (per line) Output Capacitance (Micro Linear method) Output Capacitance (X3T9.2/855D method) Regulator Output Voltage Sourcing 0-400mA Sinking 0-150mA Sinking Current Short Circuit Current VLINE = 3.5 VREF = 0V VREF = 5V Dropout Voltage Thermal Shutdown
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
CONDITIONS
MIN
TYP
MAX
UNITS
5 450 75
7 500 100
mA mA A
DISCNKT = 0V
1.0 TERMPWR -1.0
V V
Each line measured with other 17 lines high VOUT = 0.2V, each line measured with other 17 lines high TERMPWR = 0V, VREF = 0V, Any or all signal lines = 2.85V IOUT = -30mA VOUT = 3.3V DISCNKT = 0V, 2VP-P 100kHz square wave biased at 1V applied to the output DISCNKT = 0V, 0.4VP-P 1MHz square wave biased at 0.5V applied to the output
2.8 20
2.85
2.9 24
V mA A mV mA
1 -150 10 12 4
2 150
5
pF
6
7
pF
2.8 2.8 240
2.85 2.85 300 300 600 1.0 170
2.9 2.9
V V mA mA mA
L1-L18 = 0.2V
1.2
V C
4
ML6518
FUNCTIONAL DESCRIPTION
SCSI terminators are used to decrease the transmission line effects of SCSI cable. Termination must be provided at the beginning and end of the SCSI bus to ensure that data errors due to reflections on the bus are eliminated. With the increasing use of higher data rates and cable lengths in SCSI subsystems, active termination has become necessary. Active termination also minimizes power dissipation and can be activated or deactivated under software control, thus eliminating the need for end user intervention. The V-I characteristics of popular SCSI termination schemes are shown in Figure 1. Theoretically, the desired V-I characteristics are the Boulay type for signal assertion (high to low) and the ideal type for signal negation (low to high). The ML6518 with its MOSFETbased nonlinear termination element provides the most optimum V-I characteristics for both signal assertion and negation. The ML6518 provides active termination for 18 signal lines, thus accommodating basic SCSI which requires 18 lines to be terminated. When used with the ML6599, wide SCSI, which requires 27, 36 or 45 lines to be terminated, can also be accommodated. The ML6518 integrates an accurate voltage reference (1V dropout voltage) and 18 MOSFET-based termination lines. A single internal resistor is trimmed to tune the V-I characteristic of the MOSFETs. The voltage reference circuit produces a precise 2.85V level and is capable of sourcing 24mA into each of the nine terminating lines when low (active). When the signal line is negated (driver turns off), the terminator pulls the signal line back to 2.85V. The regulator will source 400mA and sink 150mA while maintaining regulation of 2.85V.
V 3.7V 3.6V
The ML6518 SCSI terminator provides an active low control signal (DISCNKT) which has an internal 200ky pull-up resistor. The DISCNKT input isolates the ML6518 from the signal lines and effectively removes the terminator from the SCSI bus with a disconnect mode current of less than 100A when pulled low. In addition, the ML6518 provides for negative clamping of signal transients and also supports current sink capability in excess of 8.3mA per signal line to handle active negation driver overshoot above 2.85V, a common occurrence with SCSI transceivers. Disconnect mode capacitance is a very critical parameter in SCSI systems. The ML6518 provides a capacitance contribution of only 5pF. HOT INSERTABILITY "Hot" insertion of a SCSI device refers to the act of plugging a SCSI device which is initially unpowered into a powered SCSI bus. The SCSI device subsequently draws power from the TERMPWR line during its startup routine and thereafter. "Hot" removal refers to the act of removing a powered SCSI device from a powered SCSI bus. A device which performs both tasks with no physical damage to itself or other devices on the bus, nor which alters the existing state of the bus by drawing excessive currents, is termed "hot-swappable." The ML6518 hot-insertable SCSI terminator typically draws 1A from any given output line (L1-L18) during a hot insertion/removal procedure, thereby protecting itself and preserving the state of the bus. The low insertion current is achieved by effectively shorting the gate to drain of the output PMOS device until the 2.85V reference (VREF) has powered up. A second PMOS in series with a Schottky diode is used as the shorting bypass device. After VREF reaches a sufficient level, the bypass device is turned off and the part operates normally.
3.3V
2.85V
2.7V 2.5V IDEAL
ML6518
BOULAY
220/330
0.2V 12mA 8.5mA 7mA 24mA 17mA 14mA I
TERMINATOR (SINK) DRIVER (SOURCE)
TERMINATOR (SOURCE) DRIVER (SINK)
20mA 40mA
24mA 48mA
Figure 1. V-1 Characteristics of Various SCSI Termination Schemes
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ML6518
As outlined in Annex G of the ANSI SCSI-3 Parallel Interface Specification (X3T9.2/855D), "The SCSI bus termination shall be external to the device being inserted or removed." In other words, any terminator connected to a device being hot inserted/removed should be inactive (accomplished by grounding the DISCNKT pin in the case of the ML6518). If the terminator being inserted/removed were in the active state, at some point in time the bus would be terminated by either 1 or 3 terminators. In either case, data integrity on the bus will be compromised. Figure 2 gives an application diagram showing a typical SCSI bus configuration. To ensure proper operation, the TERMPWR pin must be connected to the SCSI TERMPOWER line. Each ML6518 requires parallel 0.1F and 10F capacitors connected between the VREF and GND pins and the TERMPOWER line needs a 10F bypass capacitor at one node in the system. In an 8-bit wide SCSI bus arrangement ("A" Cable), a single ML6518 would be needed at each end of the SCSI cable in order to terminate the 18 active signal lines. 16-bit wide SCSI would use one ML6518 and one ML6599, while 32-bit wide SCSI bus would require two ML6518s and one ML6599. In a typical SCSI subsystem, the open collector driver in the SCSI transceiver pulls low when asserted. The termination resistance serves as the pull-up when negated. Figure 2 also shows a typical cable response to a pulse. The receiving end of the cable will exhibit a single time delay. When negated, the initial step will reach an intermediate level (VSTEP). With higher SCSI data rates, sampling could occur during this step portion. In order to get the most noise margin, the step needs to be as high as possible to prevent false triggering. For this reason the regulator voltage and the resistor defining the MOSFET characteristic are trimmed to ensure that the IO is as close as possible to the SCSI maximum current specification. VSTEP is defined as: VSTEP = VOL + (IO ZO) where VOL is the driver output low voltage, IO is the current from the receiving terminator, and ZO is the characteristic impedance of the cable. This is a very important characteristic that the terminator helps to overcome by increasing the noise margin and boosting the step as high as possible.
TERMPWR LINE ML6518 TERMPWR VREF 0.1F 10F GND
L18
10F
ML6518 TERMPWR VREF
SCSI CABLE DISCNKT DISCNKT
L1 L2
0.1F 10F GND
...
L2 L1
. . . L18
SCSI XCVR
SCSI XCVR
...
SCSI XCVR
VREG
VREG VSTEP VOL tD tD
LINE ASSERTED LINE NEGATED
Figure 2. Application Diagram Showing Typical SCSI Bus Configuration with the ML6518
6
...
ML6518
PHYSICAL DIMENSIONS inches (millimeters)
Package: H32-7 32-Pin (7 x 7 x 1mm) TQFP
0.354 BSC (9.00 BSC) 0.276 BSC (7.00 BSC) 25 0 - 8 0.003 - 0.008 (0.09 - 0.20)
1 PIN 1 ID 0.276 BSC (7.00 BSC) 0.354 BSC (9.00 BSC)
17
0.018 - 0.030 (0.45 - 0.75)
9 0.032 BSC (0.8 BSC) 0.012 - 0.018 (0.29 - 0.45) 0.048 MAX (1.20 MAX) 0.037 - 0.041 (0.95 - 1.05) SEATING PLANE
Package: S28 28-Pin SOIC
0.699 - 0.713 (17.75 - 18.11) 28
0.291 - 0.301 0.398 - 0.412 (7.39 - 7.65) (10.11 - 10.47) PIN 1 ID
1 0.024 - 0.034 (0.61 - 0.86) (4 PLACES) 0.050 BSC (1.27 BSC) 0.095 - 0.107 (2.41 - 2.72) 0 - 8
0.090 - 0.094 (2.28 - 2.39)
0.012 - 0.020 (0.30 - 0.51)
SEATING PLANE
0.005 - 0.013 (0.13 - 0.33)
0.022 - 0.042 (0.56 - 1.07)
0.009 - 0.013 (0.22 - 0.33)
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ML6518
ORDERING INFORMATION
PART NUMBER ML6518CH ML6518CS TEMPERATURE RANGE 0C to 70C 0C to 70C PACKAGE 32-pin TQFP (H32-7) (End Of Life) 28-pin SOIC (S28) (End Of Life)
(c) Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946; 2619299. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application.
2092 Concourse Drive San Jose, CA 95131 Tel: 408/433-5200 Fax: 408/432-0295
DS6518-01
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